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RHHardwareSPI.h
1 // RHHardwareSPI.h
2 // Author: Mike McCauley (mikem@airspayce.com)
3 // Copyright (C) 2011 Mike McCauley
4 // Contributed by Joanna Rutkowska
5 // $Id: RHHardwareSPI.h,v 1.12 2020/01/05 07:02:23 mikem Exp $
6 
7 #ifndef RHHardwareSPI_h
8 #define RHHardwareSPI_h
9 
10 #include <RHGenericSPI.h>
11 
12 /////////////////////////////////////////////////////////////////////
13 /// \class RHHardwareSPI RHHardwareSPI.h <RHHardwareSPI.h>
14 /// \brief Encapsulate a hardware SPI bus interface
15 ///
16 /// This concrete subclass of GenericSPIClass encapsulates the standard Arduino hardware and other
17 /// hardware SPI interfaces.
18 ///
19 /// SPI transactions are supported in development environments that support it with SPI_HAS_TRANSACTION.
21 {
22 #ifdef RH_HAVE_HARDWARE_SPI
23 public:
24  /// Constructor
25  /// Creates an instance of a hardware SPI interface, using whatever SPI hardware is available on
26  /// your processor platform. On Arduino and Uno32, uses SPI. On Maple, uses HardwareSPI.
27  /// \param[in] frequency One of RHGenericSPI::Frequency to select the SPI bus frequency. The frequency
28  /// is mapped to the closest available bus frequency on the platform.
29  /// \param[in] bitOrder Select the SPI bus bit order, one of RHGenericSPI::BitOrderMSBFirst or
30  /// RHGenericSPI::BitOrderLSBFirst.
31  /// \param[in] dataMode Selects the SPI bus data mode. One of RHGenericSPI::DataMode
33 
34  /// Transfer a single octet to and from the SPI interface
35  /// \param[in] data The octet to send
36  /// \return The octet read from SPI while the data octet was sent
37  uint8_t transfer(uint8_t data);
38 
39 #if (RH_PLATFORM == RH_PLATFORM_MONGOOSE_OS)
40  /// Transfer (write) 2 bytes on the SPI interface to an NRF device
41  /// \param[in] byte0 The first byte to be sent on the SPI interface
42  /// \param[in] byte1 The second byte to be sent on the SPI interface
43  /// \return The second byte clocked in as the second byte is sent.
44  uint8_t transfer2B(uint8_t byte0, uint8_t byte1);
45 
46  /// Read a number of bytes on the SPI interface from an NRF device
47  /// \param[in] reg The NRF device register to read
48  /// \param[out] dest The buffer to hold the bytes read
49  /// \param[in] len The number of bytes to read
50  /// \return The NRF status byte
51  uint8_t spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len);
52 
53  /// Wrte a number of bytes on the SPI interface to an NRF device
54  /// \param[in] reg The NRF device register to read
55  /// \param[out] src The buffer to hold the bytes write
56  /// \param[in] len The number of bytes to write
57  /// \return The NRF status byte
58  uint8_t spiBurstWrite(uint8_t reg, const uint8_t* src, uint8_t len);
59 
60 #endif
61 
62  // SPI Configuration methods
63  /// Enable SPI interrupts
64  /// This can be used in an SPI slave to indicate when an SPI message has been received
65  /// It will cause the SPI_STC_vect interrupt vectr to be executed
66  void attachInterrupt();
67 
68  /// Disable SPI interrupts
69  /// This can be used to diable the SPI interrupt in slaves where that is supported.
70  void detachInterrupt();
71 
72  /// Initialise the SPI library
73  /// Call this after configuring the SPI interface and before using it to transfer data.
74  /// Initializes the SPI bus by setting SCK, MOSI, and SS to outputs, pulling SCK and MOSI low, and SS high.
75  void begin();
76 
77  /// Disables the SPI bus (leaving pin modes unchanged).
78  /// Call this after you have finished using the SPI interface.
79  void end();
80 #else
81  // not supported on ATTiny etc
82  uint8_t transfer(uint8_t /*data*/) {return 0;}
83  void begin(){}
84  void end(){}
85 
86 #endif
87 
88  /// Signal the start of an SPI transaction that must not be interrupted by other SPI actions
89  /// In subclasses that support transactions this will ensure that other SPI transactions
90  /// are blocked until this one is completed by endTransaction().
91  /// Uses the underlying SPI transaction support if available as specified by SPI_HAS_TRANSACTION.
92  virtual void beginTransaction();
93 
94  /// Signal the end of an SPI transaction
95  /// Uses the underlying SPI transaction support if available as specified by SPI_HAS_TRANSACTION.
96  virtual void endTransaction();
97 
98  /// Specify the interrupt number of the interrupt that will use SPI transactions
99  /// Tells the SPI support software that SPI transactions will occur with the interrupt
100  /// handler assocated with interruptNumber
101  /// Uses the underlying SPI transaction support if available as specified by SPI_HAS_TRANSACTION.
102  /// \param[in] interruptNumber The number of the interrupt
103  virtual void usingInterrupt(uint8_t interruptNumber);
104 
105 protected:
106 
107 #if defined(SPI_HAS_TRANSACTION)
108  // Storage for SPI settings used in SPI transactions
109  SPISettings _settings;
110 #endif
111 };
112 
113 // Built in default instance
114 extern RHHardwareSPI hardware_spi;
115 
116 #endif
RHGenericSPI::Frequency8MHz
@ Frequency8MHz
SPI bus frequency close to 8MHz.
Definition: RHGenericSPI.h:60
RHGenericSPI::_frequency
Frequency _frequency
The configure SPI Bus frequency, one of RHGenericSPI::Frequency.
Definition: RHGenericSPI.h:175
RHGenericSPI
Base class for SPI interfaces.
Definition: RHGenericSPI.h:30
RHGenericSPI::_dataMode
DataMode _dataMode
SPI bus mode, one of RHGenericSPI::DataMode.
Definition: RHGenericSPI.h:181
RHGenericSPI::BitOrderLSBFirst
@ BitOrderLSBFirst
SPI LSB first.
Definition: RHGenericSPI.h:73
RHGenericSPI::DataMode1
@ DataMode1
SPI Mode 1: CPOL = 0, CPHA = 1.
Definition: RHGenericSPI.h:43
RHGenericSPI::_bitOrder
BitOrder _bitOrder
Bit order, one of RHGenericSPI::BitOrder.
Definition: RHGenericSPI.h:178
RHHardwareSPI
Encapsulate a hardware SPI bus interface.
Definition: RHHardwareSPI.h:20
RHGenericSPI::Frequency4MHz
@ Frequency4MHz
SPI bus frequency close to 4MHz.
Definition: RHGenericSPI.h:59
RHGenericSPI::DataMode0
@ DataMode0
SPI Mode 0: CPOL = 0, CPHA = 0.
Definition: RHGenericSPI.h:42
RHGenericSPI::DataMode
DataMode
Defines constants for different SPI modes.
Definition: RHGenericSPI.h:40
RHGenericSPI::attachInterrupt
virtual void attachInterrupt()
Definition: RHGenericSPI.h:118
RHGenericSPI::DataMode3
@ DataMode3
SPI Mode 3: CPOL = 1, CPHA = 1.
Definition: RHGenericSPI.h:45
RHGenericSPI::detachInterrupt
virtual void detachInterrupt()
Definition: RHGenericSPI.h:122
RHGenericSPI::DataMode2
@ DataMode2
SPI Mode 2: CPOL = 1, CPHA = 0.
Definition: RHGenericSPI.h:44
RHGenericSPI::BitOrder
BitOrder
Defines constants for different SPI endianness.
Definition: RHGenericSPI.h:70
RHGenericSPI::Frequency16MHz
@ Frequency16MHz
SPI bus frequency close to 16MHz.
Definition: RHGenericSPI.h:61
RHGenericSPI::Frequency
Frequency
Defines constants for different SPI bus frequencies.
Definition: RHGenericSPI.h:55
RHGenericSPI::Frequency2MHz
@ Frequency2MHz
SPI bus frequency close to 2MHz.
Definition: RHGenericSPI.h:58
RHGenericSPI::Frequency1MHz
@ Frequency1MHz
SPI bus frequency close to 1MHz.
Definition: RHGenericSPI.h:57
RHGenericSPI::BitOrderMSBFirst
@ BitOrderMSBFirst
SPI MSB first.
Definition: RHGenericSPI.h:72